An Experimental Study on Reject Ratio Prediction for VLSl Circuits: Kokomo Revisited

Assurlng product quality Is becoming lncreaslngly more important for the semlconductor chip manufacturers. The reject ratlo (defect level) provides a simple and accurate measure of a product's quallty. However, measuring the reject ratlo of tested chips is often not feasible or accurate. Statlstical technlques for reject ratio prediction provide a posslble way out of this dilemma. In this paper, we report on an experiment to verify the accuracy of reject ratlo predlctlons by the avallable approaches. The data collection effort Includes lnstrumentlng the wafer probe test to obtain chip failures as a function of applied vectors and running a fault simulator to obtaln the cumulative fault coverage of these vectors. The accuracy of reject ratio predictions Is judged by assuming earller stopping points for the wafer probe thereby gaining a measure of confidence In the flnal predicted value. The results of flve different analysis are reported for over 70,000 tested die of a CMOS VLSl devlce manufactured at Delco. Introduction In a world of increasing industrial competition, manufacturers are becoming ever more conscious of product quality. Perhaps, no where is this quality consciousness more evident than in the semiconductor industry where the quality levels projected for the coming decade were unthinkable just a few years ago. An accurate measure of product quality is rather easily defined and is variously denoted by the terms reject ratio, PQL (product quality level), and D f M (defects per million). The basic notion is captured by the following definition of chip quality: number of bad units tested as good number of all units tested as good ratio This simple definition belies the great difficulty of its use for semiconductor devices. Estimating the reject ratio requires an extensive and sophisticated monitoring system to collect and analyze the devices that fail past the wafer-probe stage. This presupposes a degree of cooperation amongst groups of people with scarce or nonexistent communication links. For this reason, the direct approach is rarely attempted or attempted only in limited ways. The results from even the limited experiments are generally not available because of their sensitive nature. The reject ratio of VLSl devices can be improved by increasing the fault coverage of the functional test set. However, the dependence of the reject ratio on fault coverage is complex and involves process-dependent parameters in the equation. Several statistical models (see Reject Ratio Computation) have been proposed to answer the question, "How much fault coverage is enough for a desired (predicted) reject ratio?" With so many competing models for reject ratio computation, two questions naturally arise: (a) How good are they? (b) Are they significantly different in their predictive value? In 1981, a study of actual VLSl chip production data obtained at AT&T was published 111. In this study, a model for reject ratio and fault coverage was proposed. Another significant study of chip data was conducted at Kokomo, Indiana, in 1980 jointly by Delco Electronics and Motorola [2]. Since then, several other models Paper 32.1 71 2 1990 International Test Conference CH2910-6/0000/0712$01.00